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HCD-SR1/SR2/SR3
QQ
3 7 63 1515 0
Pin No.
Pin Name
189
VNW
190
ALE
191
RST_SPC
192
HCS3
193
HCS2
194
HCS1
195
HCS0
196
VDDP
197
TRST
198
TDO
199
TDI
200
TMS
201
TCK
202
RESET
203
BUS CLK
204
GND
205
VDD
206
HA3
207
HA2
208
GNDP
TE
L 13942296513
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I/O
—
Power supply for 5V tolerance voltage input
O
Latch enable signal output for address data demux
O
Reset signal output to the mechanism controller (IC301)
O
Not used
O
Chip select signal output for Medusa (not used)
I/O
Not used
O
Chip select signal output to the external ROM (IC205)
—
Power supply terminal (+3.3V) (I/O signal)
I
Reset signal input
O
Data output
I
Data input
I
TMS signal input
I
TCK signal input
I
ZIVA reset input
I/O
Not used
—
Ground terminal (inside core)
—
Power supply terminal (+1.8V) (inside core)
I/O
Address bus 3
I/O
Address bus 2
—
Ground terminal (I/O signal)
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2 9
8
Description
Q Q
3
6 7
1 3
1 5
co
.
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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