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3 Detailed Settings
3.1 NAND / NOR Boot Option
For NAND/NOR Boot Option SW1 is used
NAND
SELFL = HIGH Boot from NAND
NOR
SEFLL = LOW
3.2
DIP Switches
SW11 – PLL Mode
SW11
Signal
1
CRIPM0
2
CRIPM1
3
CRIPM2
4
CRIPM3
5
PLLBYPASS
6
PSMODE
7
VINITHI
8
-
Notes:
CRIPM[0:3] default settings results in 533 MHz clock frequency
FSEUGCC-UM_MB86R12-CPU01_Rev1.1
Emerald-P CPU Module
SK-86R12-CPU01
Boot from onboard NOR (default)
Description
ON = 0, OFF = 1
ON = 0, OFF = 1
ON = 0, OFF = 1
ON = 0, OFF = 1
ON = PLL Clock is bypassed
OFF = PLL Clock is not bypassed
OFF = PLL clock frequency divider ratio = 0
ON = PLL clock frequency divider ratio = 1
ON = Exception Vectors located at 0xFFFF0000
OFF = Exception Vectors located at 0x00000000
Unused
- 8 -
Default
ON
ON
ON
ON
OFF
OFF
OFF
OFF
© Fujitsu Semiconductor Europe GmbH
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